...

makefile

@@ -7,7 +7,7 @@ LDFLAGS	= -g
 ASFLAGS	= -f elf64 -g -F dwarf
 
 SRC_C   := src/kernel.c src/string.c src/vga.c src/interrupts.c src/keyboard.c
-SRC_ASM := src/boot.asm src/idt.asm
+SRC_ASM := src/start.asm
 
 OBJ_C   := $(SRC_C:src/%.c=.build/%.o)
 OBJ_ASM := $(SRC_ASM:src/%.asm=.build/%.o)

src/idt.asm

@@ -1,136 +0,0 @@
-global setup_idt
-extern handle_isr
-
-%macro ISR_NOERR 1
-isr_stub_%1:
-    push qword 0
-    push qword %1
-    jmp isr_common
-%endmacro
-
-%macro ISR_ERR 1
-isr_stub_%1:
-    push qword %1
-    jmp isr_common
-%endmacro
-
-section .bss
-    align 4096
-    idt64:
-        resb 4096
-
-section .data
-    idt64_descriptor:
-        dw 4095
-        dq idt64
-
-section .text
-    bits 64
-    setup_idt:
-        mov rdi, idt64
-        mov rsi, isr_stub_table
-        mov rcx, 256
-    .loop:
-        mov rax, [rsi]
-        mov [rdi], ax
-        mov word [rdi + 2], 0x08
-        mov word [rdi + 4], 0x8E00
-        shr rax, 16
-        mov [rdi + 6], ax
-        shr rax, 16
-        mov [rdi + 8], eax
-        mov dword [rdi + 12], 0
-        add rdi, 16
-        add rsi, 8
-        loop .loop
-        lidt [idt64_descriptor]
-        sti
-        ret
-
-    isr_common:
-        push rax
-        push rbx
-        push rcx
-        push rdx
-        push rsi
-        push rdi
-        push rbp
-        push r8
-        push r9
-        push r10
-        push r11
-        push r12
-        push r13
-        push r14
-        push r15
-
-        mov rdi, rsp
-        call handle_isr
-
-        pop r15
-        pop r14
-        pop r13
-        pop r12
-        pop r11
-        pop r10
-        pop r9
-        pop r8
-        pop rbp
-        pop rdi
-        pop rsi
-        pop rdx
-        pop rcx
-        pop rbx
-        pop rax
-
-        add rsp, 16
-        iretq
-
-    ; CPU exceptions 0-31. Some of these contain error codes, so we define them manually
-    ISR_NOERR   0
-    ISR_NOERR   1
-    ISR_NOERR   2
-    ISR_NOERR   3
-    ISR_NOERR   4
-    ISR_NOERR   5
-    ISR_NOERR   6
-    ISR_NOERR   7
-    ISR_ERR     8
-    ISR_NOERR   9
-    ISR_ERR     10
-    ISR_ERR     11
-    ISR_ERR     12
-    ISR_ERR     13
-    ISR_ERR     14
-    ISR_NOERR   15
-    ISR_NOERR   16
-    ISR_ERR     17
-    ISR_NOERR   18
-    ISR_NOERR   19
-    ISR_NOERR   20
-    ISR_NOERR   21
-    ISR_NOERR   22
-    ISR_NOERR   23
-    ISR_NOERR   24
-    ISR_NOERR   25
-    ISR_NOERR   26
-    ISR_NOERR   27
-    ISR_NOERR   28
-    ISR_NOERR   29
-    ISR_ERR     30
-    ISR_NOERR   31
-
-    ; Hardware interrupts and user-defined interrupts (32-255). These don't have error codes
-    %assign i 32
-    %rep 224
-        ISR_NOERR i
-        %assign i i+1
-    %endrep
-
-section .data
-    isr_stub_table:
-        %assign i 0
-        %rep 256
-            dq isr_stub_%[i]
-            %assign i i+1
-        %endrep

src/start.asm

@@ -1,6 +1,6 @@
 global _start
 extern kernel_main
-extern setup_idt
+extern handle_isr
 
 %define FLAGS       0b10
 %define MAGIC       0x1BADB002
@@ -131,6 +131,39 @@ section .text
         hlt
         jmp .hang
 
+section .bss
+    align 4096
+    idt64:
+        resb 4096
+
+section .data
+    align 8
+    idt64_descriptor:
+        dw 4095
+        dq idt64
+
+section .data
+    align 8
+    isr_stub_table:
+        %assign i 0
+        %rep 256
+            dq isr_stub_%[i]
+            %assign i i+1
+        %endrep
+
+%macro ISR_NOERR 1
+isr_stub_%1:
+    push qword 0
+    push qword %1
+    jmp isr_common
+%endmacro
+
+%macro ISR_ERR 1
+isr_stub_%1:
+    push qword %1
+    jmp isr_common
+%endmacro
+
 section .text
     bits 64
     long_mode:
@@ -142,8 +175,107 @@ section .text
         mov gs, ax
         mov ss, ax
 
-        call setup_idt
+        ; Set up idt
+        mov rdi, idt64
+        mov rsi, isr_stub_table
+        mov rcx, 256
+    .loop:
+        mov rax, [rsi]
+        mov [rdi], ax
+        mov word [rdi + 2], 0x08
+        mov word [rdi + 4], 0x8E00
+        shr rax, 16
+        mov [rdi + 6], ax
+        shr rax, 16
+        mov [rdi + 8], eax
+        mov dword [rdi + 12], 0
+        add rdi, 16
+        add rsi, 8
+        loop .loop
+        lidt [idt64_descriptor]
+        sti
+
         call kernel_main
     .hang:
         hlt
         jmp .hang
+
+    isr_common:
+        push rax
+        push rbx
+        push rcx
+        push rdx
+        push rsi
+        push rdi
+        push rbp
+        push r8
+        push r9
+        push r10
+        push r11
+        push r12
+        push r13
+        push r14
+        push r15
+
+        mov rdi, rsp
+        call handle_isr
+
+        pop r15
+        pop r14
+        pop r13
+        pop r12
+        pop r11
+        pop r10
+        pop r9
+        pop r8
+        pop rbp
+        pop rdi
+        pop rsi
+        pop rdx
+        pop rcx
+        pop rbx
+        pop rax
+
+        add rsp, 16
+        iretq
+
+    ; CPU exceptions 0-31. Some of these contain error codes, so we define them manually
+    ISR_NOERR   0
+    ISR_NOERR   1
+    ISR_NOERR   2
+    ISR_NOERR   3
+    ISR_NOERR   4
+    ISR_NOERR   5
+    ISR_NOERR   6
+    ISR_NOERR   7
+    ISR_ERR     8
+    ISR_NOERR   9
+    ISR_ERR     10
+    ISR_ERR     11
+    ISR_ERR     12
+    ISR_ERR     13
+    ISR_ERR     14
+    ISR_NOERR   15
+    ISR_NOERR   16
+    ISR_ERR     17
+    ISR_NOERR   18
+    ISR_NOERR   19
+    ISR_NOERR   20
+    ISR_NOERR   21
+    ISR_NOERR   22
+    ISR_NOERR   23
+    ISR_NOERR   24
+    ISR_NOERR   25
+    ISR_NOERR   26
+    ISR_NOERR   27
+    ISR_NOERR   28
+    ISR_NOERR   29
+    ISR_ERR     30
+    ISR_NOERR   31
+
+    ; Hardware interrupts and user-defined interrupts (32-255). These don't have error codes
+    %assign i 32
+    %rep 224
+        ISR_NOERR i
+        %assign i i+1
+    %endrep